伍茂仁

In this thesis, a 1×2 3-D on-chip optical path using silicon waveguides and 45° micro-mirrors is proposed for optical interconnect splitters. The benefits of a 3-D structure are explored by comparing related studies and discussing their usefulness. The design of straight 3-D silicon trapezoidal waveguide using 45° micro-mirrors is discussed and verified by ray tracing software. The optical characteristics of this straight 3-D silicon trapezoidal waveguide structure are simulated, which includes the coupling efficiency of the straight 3-D silicon trapezoidal waveguide structure with a multi-mode fiber (MMF) at the receiving end of the structure, for waveguide upper-widths ranging from 35 ~ 75 μm. The coupling efficiency between the 3-D straight waveguide structure and the MMF ranges from 52.4% for 35 μm down to 36.8% for 75 μm case. The alignment tolerance of the structure to the input light source from a single-mode fiber (SMF) is simulated by finding the center of the waveguide input port and then shifting the input light source along both x and z axis with intervals of 5 μm and calculating the coupled power between the straight waveguide structure and the MMF. The 1-dB alignment tolerance of a straight waveguide with an upper-width of 50 μm structure for the x-axis ranges from -39 ~ 29 μm and for the z-axis has a range from -13.6 ~ 12.6 μm. The design of the proposed 1×2 3-D on-chip optical path using silicon waveguides and 45° micro-mirrors is introduced and discussed next. The design and the optical pathway of this 3-D splitter waveguide structure are studied for a range of input upper-waveguide widths ranging from 35 ~ 75 μm. The coupling efficiency of each of the two output ports of the splitter waveguide structure with MMF are calculated, this would represent the amount of optical power that can be transmitted by each output. The coupling efficiency for the output through the splitter structure of the waveguide referred to as optical path 1 (OP1) ranges from 8.65% for waveguide upper-width of 35 μm to 27.6% for waveguide upper-widths 75 μm. While for the output of optical path 2 (OP2) which transmits the light not deflected by the splitter junction, the coupling efficiency between the output and the MMF ranges from 48% for waveguide upper-width of 35 μm to 30.3% for waveguide upper-widths of 75 μm. The fabrication of the trapezoidal silicon waveguides with 45° micro-mirrors used for the proposed 1×2 3-D on-chip optical path is detailed including the formation of the hard mask layer by dry etching process and formation of the trapezoidal silicon waveguide structure, followed by polishing of the substrate and coating of insulation layer by Chemical Vapor Deposition (CVD). Optical Microscopy and Scanning Electron Microscopy are used to check the results from fabrication. The optical performance of both the fabricated straight and 1×2 splitter 3-D on-chip optical paths are measured using an input light source from SMF and a MMF at the receiving end of the waveguide. Results from simulation and measurement of show that this structure can achieve close to 1:1 power ratio when the waveguide upper-width is at 70 μm with coupling efficiency at 8%.